Self-Biased PLL Design

The Phase-Locked Loop (PLL) design project is an attempt to get the students exposed to custom mixed-signal silicon IP design from specifications, schematic capture, spice simulations, and layout using industry-standard EDA tools. Students started with basic CMOS inverter design and simulations to more complex PLL IP design. We have achieved major project milestones by completing a functionally accurate PLL top-level schematics and full loop simulations in the Cadence design environment.

This project was under the mentorship of Mr. Amir Bashir who worked at Intel Corp. His commitment to this project is evident from the fact that despite him residing in the US he attended weekend online meetings for over a year. His advice has been critical in the completion of this project milestone. Locally, the project team comprising 6 internees was supervised by Dr. Salman Zaffar. These internees, namely Ahmed Pervez, Arisha Afzal, Ayesha Shakir, Hammad Shahid, Saad Mushtaq, and Sarah Mazhar have given their best in making their individual components of PLL work and resultantly the integrated PLL works flawlessly across various configurations. Just to highlight this project was beyond their daytime regular university coursework. Mr. Wajeh ul Hassan is thanked for providing just in time excellent technical support for the Cadence design environment. We also want to acknowledge Dr. John G. Maneatis contributions to the industry innovations as we chose his PLL architecture trend setting technical papers as basis to learn and promote microelectronics research.

Finally, the Microelectronics Research Laboratories-MERL headquartered at the UIT University is to be praised for providing not only the PLL project idea, the licensed Cadence IC design tool for the simulations but also the funding support for the 6 internees for the whole duration of the project. MERL Director, Dr. Roomi Naqvi, is to be congratulated for dreaming about MERL and making his dream come true through tireless efforts over the last two decades.