Khadija


Research Intern

I'm in final year of BE-Computer Systems Engineering from UIT, currently working as Research Intern in MERL, and have the privilege of contributing to the NOVA project

Projects
  • RV32I Single Cycle Processor
  • 5 Stage Pipelining
  • NOVA1 SoC
  • Working on MultiCore SoC for SMP Linux
Interest
  • Hardware/ Software Designing
  • AI/Machine learning
Skills
  • SystemVerilog
  • Verilog
  • AWS FPGA
  • RISCV Assembly Language
  • C++
  • Python
  • MATLAB
Contact