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Hello Everybody, i am

Auringzaib Sabir

Research Associate / Verification Engineer

Over the last few years, I have been serving in the semiconductor industry as a Hardware Verification Engineer. I have worked on a variety of large and small hardware projects.


Projects

  • Verification of AZADI-SOC. It is a RISC-V ISA core. (In progress)

Interests

  • Hardware design and Verification
  • Contribution to improving hardware verification by automation and AI & ML algorithms
  • Add more skills to the list and brush up on the current ones
  • Open source technology like RISC-V.

Skills

  • Verilog
  • System Verilog
  • OOP
  • UVM (universal verification methodology)
  • constrained-random verification environments and functional coverage collections (by cover-groups & assertions)
  • Knowledge of CXL
  • PCIe
  • QDMA
  • FPGAs & ASIC
  • RISC-V ISA

Find us

UIT: ST-13, Block 7, Gulshan-e-Iqbal, Karachi

Call us

UIT: +92 (213) 499 4305

Mail us

merl@uit.edu
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